Taipei: Artificial intelligence is reshaping competition in the semiconductor industry, shifting the focus beyond transistor scaling to advanced packaging, materials, and system-level integration, experts said at a Taiwan-Japan semiconductor forum on Monday. Taiwan Semiconductor Research Institute (TSRI) Deputy Director General Tsai Hann-huei highlighted that advances in process-node technology were slowing while AI-driven demand for bandwidth continued to surge.

According to Focus Taiwan, Tsai emphasized that leadership in the industry will emerge from system-level co-optimization rather than relying solely on transistor scaling. Future semiconductor systems will increasingly need to integrate computing, sensing, power management, and connectivity for applications such as automobiles, humanoid robots, AI glasses, and drones.

Tsai noted that TSRI provides a die-level heterogeneous integration and verification platform to assist designers in developing next-generation chip systems. However, he acknowledged that progress in advanced packaging and silicon photonics is challenged by the interplay of heat, electricity, optics, and mechanical stress, as well as large-scale testing and coordination across the semiconductor ecosystem.

To overcome these barriers, Tsai suggested that partnerships among industry, academia, and research institutions are necessary. He revealed that TSRI is already collaborating with Japanese partners on three-dimensional heterogeneous integration, advanced packaging, quantum computing, power devices, and materials analysis.

Meanwhile, Dinos Huang, senior director of corporate research and development at ASE Technology Holding Co., pointed out that the rapid expansion of AI models and applications is placing pressure on the physical infrastructure needed to support them. He stated that "hardware is becoming the new bottleneck."

Huang explained that AI and high-performance computing systems require greater bandwidth and computing power, posing challenges in power consumption, latency, cooling, and structural stability. To meet these demands, advances in packaging equipment, low-loss and heat-resistant materials, heterogeneous integration, inspection, testing, and smart manufacturing are essential.

Huang also mentioned that ASE is transitioning from wafer-level to panel-level packaging, which provides a larger usable area and can enhance material utilization as AI processors grow in size and complexity. The industry is also moving toward optical interconnects to replace electrical transmission between systems and chips, enabling higher speeds while reducing energy consumption.

The forum, organized by the Taiwan-Japan Semiconductor Technology Association, focused on opportunities for bilateral semiconductor collaboration in the AI era.